sorry, I didn't notice you were talking about the DE2-70, I forget that there are multiple versions of the DE2 board
Of course the 'normal' DE2 build will not work on that board.
There shouldn't be that much differences between the boards, so you can easily start with the existing DE2 port (which, by the way, only has minimal differences to the DE1 port). The last known working version was minimig-de2-rel5 made by MasterOfGizmo I believe. For some reason the latest release (rel6) doesn't work, like MMrobinsonb5 said, it's probably a timing problem on SRAM or SDRAM.
Your best bet to make it work on the DE2-70 is to write a SSRAM controller and replace the existing SRAM controller. I guess that shouldn't be too hard, since SSRAM shouldn't be that different from SRAM, with the difference of the required clock.
Somewhat less desirable approach would be to use the SDRAM as SRAM replacement. The interface logic is already written (here: https://github.com/rkrajnc/minimig-de1/ ... m_bridge.v
), you just have to attach it to the free SDRAM controller port, do the necessary address translation (I don't remember where exactly, but there is a part of SDRAM that isn't used by the Amiga side), and connect the bridge to the SRAM port on the qmem_bus module.
When I find some time, I can help you with this if you want. If you will start working on this yourself, feel free to ask if you will have any problems.