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Discussing the Open Source FPGA Amiga Project
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 Post subject: Re: minimig-de1-rel6
PostPosted: Sat Jan 11, 2014 10:13 am 
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Joined: Mon Dec 01, 2008 9:58 pm
Posts: 1566
Location: .de
Looks great! :)
Asm-ONE still rox :D

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 Post subject: Re: minimig-de1-rel6
PostPosted: Sat Jan 11, 2014 1:05 pm 
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Joined: Tue Nov 09, 2010 3:10 pm
Posts: 315
Thanks guys! :)

Yeah, AsmOne is great!

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 Post subject: Re: minimig-de1-rel6
PostPosted: Sun Mar 02, 2014 11:20 am 
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Joined: Tue Dec 13, 2011 7:48 pm
Posts: 341
Hey Chaos, any chance you could push the source for the latest build to the github repo? I'd like to do a build for my DE2 board.

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 Post subject: Re: minimig-de1-rel6
PostPosted: Sun Mar 02, 2014 3:49 pm 
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Joined: Tue Nov 09, 2010 3:10 pm
Posts: 315
The github repo is up to date, but if you mean the rel6 build, it's not ready yet. Anyway, the master branch should be working, although I do use the master as the development branch, and only the tagged releases are considered working. You will have to update the rtl/soc/minimig_de2_top.v and fpga/de2/minimig_de2.qsf, as I don't update them - I was planing to bring the DE2 up to date when the rel6 will be ready.

I'll see if I have any local changes not in the Github repo that are stable enough to push.

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 Post subject: Re: minimig-de1-rel6
PostPosted: Sun Mar 02, 2014 7:33 pm 
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Joined: Tue Dec 13, 2011 7:48 pm
Posts: 341
OK no problem - but master head doesn't currently build (for the DE1, complains about missing cache - haven't investigated beyond that yet.) So I'll find the most recent tag and use that when I next have time to play :)

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 Post subject: Re: minimig-de1-rel6
PostPosted: Sun Mar 02, 2014 8:11 pm 
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Joined: Tue Nov 09, 2010 3:10 pm
Posts: 315
OK, I see the problem, sorry ;) I will really have to come up with a better development model, as the master branch often isn't build-able ;)

If you want to use the current master, please add these three files to the Quartus project file (qsf):

Code:
set_global_assignment -name VERILOG_FILE ../../rtl/sdram/tpram_be_512x16.v
set_global_assignment -name VERILOG_FILE ../../rtl/sdram/tpram_128x32.v
set_global_assignment -name VERILOG_FILE ../../rtl/sdram/cpu_cache.v


The cache doesn't work, btw - it is effectively disabled, so the core should still be usable, although slow. I'm having soooo much fun with Timequest trying to make this work ;)

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 Post subject: Re: minimig-de1-rel6
PostPosted: Sun Mar 02, 2014 9:24 pm 
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Joined: Tue Dec 13, 2011 7:48 pm
Posts: 341
chaos wrote:
If you want to use the current master, please add these three files to the Quartus project file (qsf):

Code:
set_global_assignment -name VERILOG_FILE ../../rtl/sdram/tpram_be_512x16.v
set_global_assignment -name VERILOG_FILE ../../rtl/sdram/tpram_128x32.v
set_global_assignment -name VERILOG_FILE ../../rtl/sdram/cpu_cache.v



Ah, a nice simple fix, then - I'd hoped it would be as easy as adding files to the project :)

Quote:
The cache doesn't work, btw - it is effectively disabled, so the core should still be usable, although slow. I'm having soooo much fun with Timequest trying to make this work ;)


Yeah it's a pain isn't it? There are so many paths through the TG68 - figuring out which ones can be multicycled and by how many cycles is a nightmare!

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Details of my projects: http://retroramblings.net


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 Post subject: Re: minimig-de1-rel6
PostPosted: Tue Mar 11, 2014 9:57 pm 
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Joined: Tue Nov 09, 2010 3:10 pm
Posts: 315
Just a quick update:

I implemented the new bootup that works without the Amiga CPU, it just needs some cleanup in the firmware. You can see the graphics in the attached picture or in this video: https://www.youtube.com/watch?v=9qkEBTRkLNU

I'm still working on the cache, see the nice speedup in the attached picture ;) There are some problems with the stability of the cache, it works in simulations, it works with memory testing programs, but sometimes in Workbench minimig just goes berserk. Hopefully this will be resolved soon, otherwise I'll just revert to the old cache and leave this for some later time (I'm getting tired trying to figure this out :))

One more thing I'd like to finish for rel6 is the mouse scroll wheel support. I'm guessing rel6 will be ready in a week or two.

Have fun!


Attachments:
minimig_de1_new_cache.jpg
minimig_de1_new_cache.jpg [ 123.21 KiB | Viewed 1101 times ]
minimig_de1_boot.jpg
minimig_de1_boot.jpg [ 49.7 KiB | Viewed 1101 times ]

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 Post subject: Re: minimig-de1-rel6
PostPosted: Tue Mar 11, 2014 11:19 pm 
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Joined: Thu Jun 18, 2009 9:54 am
Posts: 349
Great work, Chaos!!
Eagerly waiting for this on my DE1!! :D


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 Post subject: Re: minimig-de1-rel6
PostPosted: Tue Mar 11, 2014 11:58 pm 
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Joined: Tue Dec 13, 2011 7:48 pm
Posts: 341
chaos wrote:
One more thing I'd like to finish for rel6 is the mouse scroll wheel support. I'm guessing rel6 will be ready in a week or two.


Excellent news - in which case I won't worry about finding time to get the DE2 port working until rel6 is out :)

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~ Amiga 4000/030 ~ Amiga 1200 030/50MHz ~ Turbo Chameleon 64 ~ Altera DE1 with Minimig core ~
Details of my projects: http://retroramblings.net


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