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Discussing the Open Source FPGA Amiga Project
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 Post subject: Re: New minimig build for the DE1
PostPosted: Mon Oct 29, 2012 2:34 pm 
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Posts: 105
chaos wrote:
Your idea to put some SPI master on the Amiga side could well work, but it would complicate the SDRAM controller further - either by adding a bypass mux for the whole bus, which would be used by the added SPI master on boot up to load the kick.rom and/or AR3.rom, or you'd have to add another port to the SDRAM controller.


SPI master? Do you mean "SPI client based 68k bus master"?

It seems to me the chameleon code already has another port to the SDRAM as the second TG68 also uses the same physical SDRAM for its own purposes. Actually this second TG68 might already be able to directly write into that portion of SDRAM which is used to store the kick.rom etc. Is this right?


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 Post subject: Re: New minimig build for the DE1
PostPosted: Mon Oct 29, 2012 3:51 pm 
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Posts: 341
Master of Gizmo wrote:
It seems to me the chameleon code already has another port to the SDRAM as the second TG68 also uses the same physical SDRAM for its own purposes.


The second TG68 does have its own route into the SDRAM controller (the ports marked with a z prefix)

Quote:
Actually this second TG68 might already be able to directly write into that portion of SDRAM which is used to store the kick.rom etc. Is this right?


There's currently some address mangling going on to keeps its address space separate from the first CPU. (If memory serves it's mapped to 0xA00000 on Chameleon, though I might have changed that in my most recent build, I'll have to check later.)

There's no reason why the second TG68 couldn't upload the ROM directly into the SDRAM, though the address mangling (which I think happens in the SDRAM controller module) may need adjusting. (I can't remember off the top of my head whether it's done with masking or bit toggling. If the latter, it's just a matter of figuring out the correct address to write to.)

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~ Amiga 4000/030 ~ Amiga 1200 030/50MHz ~ Turbo Chameleon 64 ~ Altera DE1 with Minimig core ~
Details of my projects: http://retroramblings.net


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 Post subject: Re: New minimig build for the DE1
PostPosted: Tue Oct 30, 2012 12:49 pm 
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MMrobinsonb5 wrote:
There's no reason why the second TG68 couldn't upload the ROM directly into the SDRAM, though the address mangling may need adjusting.


The question probably is: Is the effort to do this much higher than the benefit? The FPGA arcade and my device have a seperate microcontroller and wouldn't benefit much from this.

The main advantage would be that there wouldn't be aneed for the 68k bootrom anymore. This would save space in the microcontroller-inside-FPGA-setups and it would simplify other cores as the upload of rom data would not require special code on the target side.


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 Post subject: Re: New minimig build for the DE1
PostPosted: Tue Oct 30, 2012 6:32 pm 
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Master of Gizmo wrote:
The question probably is: Is the effort to do this much higher than the benefit?


Well it'd be a fairly easy change to make but the platform that would most benefit from it (DE1) no longer uses the SDRAM for the controller CPU.

Quote:
The main advantage would be that there wouldn't be aneed for the 68k bootrom anymore. This would save space in the microcontroller-inside-FPGA-setups and it would simplify other cores as the upload of rom data would not require special code on the target side.


On the other hand, the 68k bootrom does (on most current variants) display status information during bootup, so you'd probably still need a small bootrom just to set up the display, even if the actual screen data were written from the controller CPU.

The best reason I can think of not to go down that route is simply to minimise divergence between the many Minimig variants. (I can think of 8 currently - any advance on 8? :D )

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~ Amiga 4000/030 ~ Amiga 1200 030/50MHz ~ Turbo Chameleon 64 ~ Altera DE1 with Minimig core ~
Details of my projects: http://retroramblings.net


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