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Discussing the Open Source FPGA Amiga Project
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 Post subject: About how the copper module is designed
PostPosted: Mon Sep 16, 2013 12:01 am 
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Joined: Tue Dec 02, 2008 9:42 am
Posts: 42
So I only know enough Verilog and hw design to be dangerous - I can try to modify something, but not enough to build something from scratch.

I've had the idea that I should try to graft on a blipper to the copper. Just because.
As I pour over the listing (and it seems to be easier to understand for every time - must be a learning thing) I struggle a bit how I should go about getting the innermost parts aligned with what is already there. That's to be expected I guess.

What keeps coming back to me though is the impression that I can't stop thinking that the original on-chip design somehow probably was a lot leaner and "simplified". Or is this just a case of Verilog verboseness?

I feel like putty mentally slipping through my fingers as I try to grip it and it looks like it should be easy enough to hold. This will take some time.


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 Post subject: Re: About how the copper module is designed
PostPosted: Mon Sep 16, 2013 7:48 am 
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Joined: Tue Dec 13, 2011 7:48 pm
Posts: 341
NorthWay wrote:
What keeps coming back to me though is the impression that I can't stop thinking that the original on-chip design somehow probably was a lot leaner and "simplified". Or is this just a case of Verilog verboseness?.


I seem to remember Jens saying, of the CloneA project, that every time they fixed a bug or a divergence from the original chipset's behaviour, the synthesized design got smaller!

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 Post subject: Re: About how the copper module is designed
PostPosted: Mon Sep 16, 2013 10:39 am 
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Joined: Mon Dec 01, 2008 9:58 pm
Posts: 1568
Location: .de
It depend on the implemented function.
Some bugs are:
- The chipset permanently act as ECS
- The chipset permanently act as OCS or OCS-A1000
- The original chipset function is unclear and need a "hack" to work

To get it work as desired for the OSD selected model, all chipset generation function need to be present (like DDF/DIW handling).
In this case the synthesized design get more complex or "bigger".

If the design only should act as say ECS, the structure will get smaller and less complex.

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 Post subject: Re: About how the copper module is designed
PostPosted: Wed Sep 18, 2013 8:57 am 
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Joined: Tue Dec 02, 2008 9:42 am
Posts: 42
The source does not explicitly define "dma_ena" before it uses it: Is this good coding practice?


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