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 Post subject: TG68 stack problem
PostPosted: Wed Aug 25, 2010 9:14 pm 
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Joined: Tue May 05, 2009 11:53 am
Posts: 8
Location: France
Hi,

I hope someone could help me with a stack problem on TG68 rev1.06.
I tried to start my minimig version (Altera NIOSII starter kit) with the kickstart 1.3.
Everything works fine until the switch to the user mode at address FC04BE (and.w #0,SR)
After that, the TG68 no longer uses its SP register but seems to use another address register used for video display. (It's not a good idea :-()
I've done some snapshots:
A BSR not working Image
A BSR working Image
The register index RWindex_A is not the same. It's 16 when it works and 0 otherwise.
In the TG68 code, the bit 4 is managed by rf_dest_addr before conversion in integer.
Code:
IF rf_dest_addr_tmp(3 downto 0)="1111" AND to_USP='0' THEN
         rf_dest_addr(4) <= Flags(13) OR trapmake;

The flag 13 is the supervisor flag turn to 0 for the user mode. So it seems working as it should be.

The mk68 has a user and a supervisor stack pointer(A7 and A7'), but I don't know how it works.
If someone can give me a clue I'll be greatful.


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 Post subject: Re: TG68 stack problem
PostPosted: Thu Aug 26, 2010 2:44 pm 
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Joined: Tue May 05, 2009 11:53 am
Posts: 8
Location: France
It's not a bug ...
I have 1Mo chip ram but no slowfast memory therefore the execbase address is at $676 and not $c00276.
The user stack is setup after it. So it's OK but I have to figure out what goes wrong in this memory area.


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 Post subject: Re: TG68 stack problem
PostPosted: Thu Aug 26, 2010 11:46 pm 
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Joined: Mon Dec 01, 2008 9:58 pm
Posts: 1568
Location: .de
Sorry, I cant help here.
But perhaps Tobias himself can.

Add: I wrote him an email and wait for his answer :)

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 Post subject: Re: TG68 stack problem
PostPosted: Fri Aug 27, 2010 1:53 pm 
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Joined: Fri Aug 27, 2010 9:36 am
Posts: 6
Hi,

I also have a problem with the TG68 on a custom minimig.

Basically, I have connected a second FPGA (a Spartan 3E, 500k gates) "in parallel" to the MC68SEC000, in order to upgrade the minimig with a faster softcore (TG68) and SDRAM. I can choose to use the tg68 or the external 68SEC000 processor.

In the tg68-mode, the external FPGA asserts the /BR signal and it waits for /BG, and then it takes control over the bus. Conversely, in 68SEC000-mode, the FPGA has all its I/Os in high impedance (/BR is tied to 3.3V with a pull-up) and the 68SEC000 has the control of the bus.

If I boot the minimig in 68SEC000-mode, it works fine with all the kickstarts (at least with the r34 and r39 core), and there is no problem at all.

However, if I boot the minimig in tg68-mode, the bootloader works, but the kickstart cannot complete the diagnostic sequence and the screen remains either black (kickstart 3.1 with hd enabled) or white (kickstart 2.04 V37.175).
In particular, with ks2.04 the screen changes color a few times (black, dark grey, grey, white), and with the ks3.1 it also sends a "Recalibrate" command to the HDF handler routine.

If I upload the AR3.rom too, I can enter the AR console by pressing Ctrl-break, but only before the screen becomes white.

With the AR3.rom I can use all the commands except those disk-related (probably because AR3 says that the exec base is not valid). The ram test command says that all the locations are ok.

regards

Nicola


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 Post subject: Re: TG68 stack problem
PostPosted: Fri Aug 27, 2010 3:51 pm 
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Joined: Mon Dec 01, 2008 9:58 pm
Posts: 1568
Location: .de
petnnw wrote:
Basically, I have connected a second FPGA (a Spartan 3E, 500k gates) "in parallel" to the MC68SEC000, in order to upgrade the minimig with a faster softcore (TG68) and SDRAM. I can choose to use the tg68 or the external 68SEC000 processor.


That sounds interesting!
Would it be possibble to take some picture of this and post them here, until we wait for an answer to solve the softcore cpu issue?

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 Post subject: Re: TG68 stack problem
PostPosted: Sat Aug 28, 2010 9:13 pm 
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Joined: Mon Dec 21, 2009 8:19 pm
Posts: 9
boing4000 wrote:
Sorry, I cant help here.
But perhaps Tobias himself can.

Add: I wrote him an email and wait for his answer :)


I have not receive an email yet.

But I think i can't give "petnnw" an answer.
@petnnw
If you use ALTERA FPGAs use "Signal Tap" to find out whats wrong in your design.


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 Post subject: Re: TG68 stack problem
PostPosted: Sat Aug 28, 2010 9:32 pm 
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Joined: Mon Dec 01, 2008 9:58 pm
Posts: 1568
Location: .de
TobiFlex wrote:
I have not receive an email yet.

Yep, actually it was a PM in a1k.org, but anyway obselete by now :)

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 Post subject: Re: TG68 stack problem
PostPosted: Sun Aug 29, 2010 7:25 pm 
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Joined: Tue May 05, 2009 11:53 am
Posts: 8
Location: France
boing4000 wrote:
Sorry, I cant help here.
But perhaps Tobias himself can.

Add: I wrote him an email and wait for his answer :)

Thank you.

petnnw wrote:
However, if I boot the minimig in tg68-mode, the bootloader works, but the kickstart cannot complete the diagnostic sequence and the screen remains either black (kickstart 3.1 with hd enabled) or white (kickstart 2.04 V37.175).
Nicola

It looks like the same for me ... the screen remains white (Kickstart 1.3).
It's in InitCode when initializing Rom libraries.
I have no informations on that part of the kickstart. Expansion seems to be initialized but after that I don't known exactly what happend. I made a complete disassembly of the ROM to help. If you have some docs I'll be glad.

TobiFlex wrote:
If you use ALTERA FPGAs use "Signal Tap" to find out whats wrong in your design.

I'm using signal tap but It doesn't work all the time. When I monitors the RWindex_A signal, It works on the first compilation but not after. Some pins ain't valid anymore ... It's weird. Have you ever experienced such thing?


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 Post subject: Re: TG68 stack problem
PostPosted: Mon Aug 30, 2010 12:40 pm 
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Joined: Tue May 05, 2009 11:53 am
Posts: 8
Location: France
I found out what happend. When a dma read is to close from a cpu write access, there is a conflict. Some signals are not updated.

Here a signal tap output when running a test program. The read access of denise disturbs the cpu write access.
The first read access at 800C is ok, but the second one uses the write address instead of 800E. The first write access is not working too.
Image

I have to make some modifications on my memory controller :(
I hope to run my minimig this week.


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 Post subject: Re: TG68 stack problem
PostPosted: Wed Sep 01, 2010 4:13 pm 
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Joined: Fri Aug 27, 2010 9:36 am
Posts: 6
boing4000 wrote:

That sounds interesting!
Would it be possibble to take some picture of this and post them here, until we wait for an answer to solve the softcore cpu issue?


I'm going to take some pictures. Where should I post them? Here, or in another thread?


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