Here is release of pic hex for latest Yaqube FPGA YQ091224.
This firmware contains everything same as previous firmwares including all fixes.
It also contains latest fixes that yaqube made on ARM code:
- updated non-standard sync-word list (North&South)
- updated sector gap length
- modified sector read algorithm (Marble Madness)
- fixed sector header generation (Exolon)
- improved disk-change signaling (Andromeda/Seven Seas)
- increased access speed in CPU turbo mode (over 100 KB/s)
Difference here is that Floppy tansfer mode is more like 45 KB/s
- 49.63 MHz CPU turbo mode (works reliably with all tested 16 MHz versions of 68SEC000)
This is actually FPGA feature, sysinfo reports 39,00 MHz. I'm only concerned about CPU cooling because of different CPUs.
It might be good idea instead of haveing 2 cpu speed modes to have three e.g. normal, fast, turbo.
Hard disk emulation:
- improved read speed (over 1800 KB/s with Class 6 SDHC cards)
VERY IMPORTANT: SET MAXTRANSFER TO 0x1FE00 FOR EVERY PARTITION
I'm currenty trying to make changes in HD emulation to support multi block transfers that new ARM core is supporting.
Unfortunately I have only 464 bytes of free rom to make it work so I'm not really sure that I can make it work.
Anyway I'm going to try it...
Yaqube why is Important to set Max Transfer to 0x1FE00? I'm asking because I don't know what this setting does to HD emulation? What would happend if this setting is left to default ?
Anyway to avoid confusion HD emulation on this pic core still works but it is not fast as with ARM board.
- massive rewrite of Blitter (very cycle exact - improves compatibility a lot)
- improved Copper timing
- improved Bitplane DMA engine timing
- improved Audio DMA engine timing
- ECS Denise (Super Hires mode requires bypassing of scandoubler)
- improved pixel pipeline timing (Copper generated backgrounds alligned with bitplanes and sprites - Agony, Shadow of the Beast)
- OSD selectable OCS/ECS chipset features (use with care as this setting is immediate)
- 0.5 MB of CHIP RAM is mirrored to improve compatibility (Cannon Fodder Xmas Edition)
This are all features of new FPGA core
So nothing related to PIC code
I have question about scan doubling in FPGA core because I have kind of strange issue on my Samsung LCD.
Picture looks like it is missing 1 vertical hires pixel every 16 lores pixels. I don't thing this is FPGA core issue beause I was able to manually adjust monitor for picture to look good. I was comparing this to older core and looks same on older core also.
FPGA core can be downloaded here