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Discussing the Open Source FPGA Amiga Project
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 Post subject: Pic firm. with SDHC, FAT16/32, Dir, HDD support for YQ091224
PostPosted: Tue Jan 05, 2010 7:15 pm 
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Joined: Sat Jul 11, 2009 12:48 am
Posts: 48
Hi,

Here is release of pic hex for latest Yaqube FPGA YQ091224.
This firmware contains everything same as previous firmwares including all fixes.

It also contains latest fixes that yaqube made on ARM code:

Quote:
Floppy subsystem:
- updated non-standard sync-word list (North&South)
- updated sector gap length
- modified sector read algorithm (Marble Madness)
- fixed sector header generation (Exolon)
- improved disk-change signaling (Andromeda/Seven Seas)
- increased access speed in CPU turbo mode (over 100 KB/s)

Difference here is that Floppy tansfer mode is more like 45 KB/s

Quote:
CPU:
- 49.63 MHz CPU turbo mode (works reliably with all tested 16 MHz versions of 68SEC000)

This is actually FPGA feature, sysinfo reports 39,00 MHz. I'm only concerned about CPU cooling because of different CPUs.
It might be good idea instead of haveing 2 cpu speed modes to have three e.g. normal, fast, turbo.

Quote:
Hard disk emulation:
- improved read speed (over 1800 KB/s with Class 6 SDHC cards)

VERY IMPORTANT: SET MAXTRANSFER TO 0x1FE00 FOR EVERY PARTITION

I'm currenty trying to make changes in HD emulation to support multi block transfers that new ARM core is supporting.
Unfortunately I have only 464 bytes of free rom to make it work so I'm not really sure that I can make it work.
Anyway I'm going to try it...

Yaqube why is Important to set Max Transfer to 0x1FE00? I'm asking because I don't know what this setting does to HD emulation? What would happend if this setting is left to default ?

Anyway to avoid confusion HD emulation on this pic core still works but it is not fast as with ARM board.

Quote:
Chipset:
- massive rewrite of Blitter (very cycle exact - improves compatibility a lot)
- improved Copper timing
- improved Bitplane DMA engine timing
- improved Audio DMA engine timing
- ECS Denise (Super Hires mode requires bypassing of scandoubler)
- improved pixel pipeline timing (Copper generated backgrounds alligned with bitplanes and sprites - Agony, Shadow of the Beast)
- OSD selectable OCS/ECS chipset features (use with care as this setting is immediate)
- 0.5 MB of CHIP RAM is mirrored to improve compatibility (Cannon Fodder Xmas Edition)

This are all features of new FPGA core :) So nothing related to PIC code :)

I have question about scan doubling in FPGA core because I have kind of strange issue on my Samsung LCD.
Picture looks like it is missing 1 vertical hires pixel every 16 lores pixels. I don't thing this is FPGA core issue beause I was able to manually adjust monitor for picture to look good. I was comparing this to older core and looks same on older core also.

FPGA core can be downloaded here.

Quille


Attachments:
File comment: PGL091230 for latest fpga core YQ091224
MiniMigPic.rar [26.69 KiB]
Downloaded 721 times
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 Post subject: Re: Pic firm. with SDHC, FAT16/32, Dir, HDD support for YQ091224
PostPosted: Tue Jan 05, 2010 8:52 pm 
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Joined: Mon Dec 01, 2008 10:11 am
Posts: 197
quille wrote:
Quote:
CPU:
- 49.63 MHz CPU turbo mode (works reliably with all tested 16 MHz versions of 68SEC000)
This is actually FPGA feature, sysinfo reports 39,00 MHz. I'm only concerned about CPU cooling because of different CPUs.
It might be good idea instead of haveing 2 cpu speed modes to have three e.g. normal, fast, turbo.

The CPU is barely warm when clocked at 49 MHz. I'm pretty sure all the speed grades are made during the same technological process. I'm a little bit surprised these chips can be overclocked so much (one of my Minimigs runs stable at 56 MHz). The speed gain isn't spectacular due to lack of zero-waitstate memory or a cache.

Quote:
Quote:
Hard disk emulation:
- improved read speed (over 1800 KB/s with Class 6 SDHC cards)

VERY IMPORTANT: SET MAXTRANSFER TO 0x1FE00 FOR EVERY PARTITION
I'm currenty trying to make changes in HD emulation to support multi block transfers that new ARM core is supporting.
Unfortunately I have only 464 bytes of free rom to make it work so I'm not really sure that I can make it work.
Anyway I'm going to try it...

I think it's not worth the hassle. It will be a little bit faster but the real bottleneck is hardfile seek time.

Quote:
Yaqube why is Important to set Max Transfer to 0x1FE00? I'm asking because I don't know what this setting does to HD emulation? What would happend if this setting is left to default ?

MAXTRANSFER tells the filesystem handler process what is the maximum amount of data which can be transfered to/from device driver (scsi.device) in one transaction. The ATA read/write command can transfer up to 256 sectors (128KB) and if larger transfer is requested the device driver should divide it in a number of multiple smaller transfers. It's done this way in case of some device drivers but not in case of original A1200/A600 scsi.device.

The previous release doesn't use ATA multiple sector transfer commands and scsi.device works reliably regardless of the MAXTRANSFER setting. In the latest firmware I have implemented ATA multiple sector transfer commands to improve performance and it requires the MAXTRANSFER value to be set to less than 0x20000 (0x1FE00 recommended). You will get corrupted data during reading or writing of large files (most often after the first 128 KB) if the MAXTRANSFER value is higher than 0x20000 (128 KB).

Quote:
I have question about scan doubling in FPGA core because I have kind of strange issue on my Samsung LCD.
Picture looks like it is missing 1 vertical hires pixel every 16 lores pixels. I don't thing this is FPGA core issue beause I was able to manually adjust monitor for picture to look good. I was comparing this to older core and looks same on older core also.

You need to set monitor's sampling clock to 908 pixels per scanline. Otherwise you will get missing or doubled horizontal pixels. Not every monitor is capable of being set correctly.


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 Post subject: Re: Pic firm. with SDHC, FAT16/32, Dir, HDD support for YQ091224
PostPosted: Wed Jan 06, 2010 12:53 pm 
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Joined: Mon Jan 04, 2010 12:30 pm
Posts: 20
Location: Sydney, Australia
yaqube wrote:

The CPU is barely warm when clocked at 49 MHz. I'm pretty sure all the speed grades are made during the same technological process. I'm a little bit surprised these chips can be overclocked so much (one of my Minimigs runs stable at 56 MHz). The speed gain isn't spectacular due to lack of zero-waitstate memory or a cache.



I agree that there is not much speed gain at 49MHz, but in the game 'Frontier Elite II' the difference between normal and turbo is excellent! (This game was written in pure 68k ASM and is maths heavy). Animation is actually smooth compared to what I was used to on my A500 :-).

Ross..


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 Post subject: Re: Pic firm. with SDHC, FAT16/32, Dir, HDD support for YQ091224
PostPosted: Thu Jan 07, 2010 4:28 pm 
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Joined: Mon Dec 01, 2008 9:58 pm
Posts: 1568
Location: .de
Thanks quille for your new/adapted PIC firmware release :)

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 Post subject: Re: Pic firm. with SDHC, FAT16/32, Dir, HDD support for YQ091224
PostPosted: Thu Jan 07, 2010 11:31 pm 
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Joined: Sat Jul 11, 2009 12:48 am
Posts: 48
Hi!

Yaqube thanks for clarification about max transfer.
Quote:
I think it's not worth the hassle. It will be a little bit faster but the real bottleneck is hardfile seek time.

You are right about this also, HD file seek is bottleneck. I was considering to use faster SPI but I'm not sure if it is possible with PIC.
It requires HW modification and FW option ..

While I was studying latest ARM core code I noticed that core is sending sectors in loop instead one by one.
I have implemented sending sectors in loop for normal commands but this slows down menus specially when HD is active e.g. booting.
Probably this is not the case with ARM core because everything works faster but I think I'll leave it as it was for PIC core.

I'm going to play a bit with HD file emulation a bit further but chance to implement all new features is drastically dropped even with code refactoring to make it smaller.

Thanks for monitor tip also, I have found discussion about this issue and managed to tune my monitor correctly now scrolling looks fine :)

Ross, Yaqube, thanks for CPU speed info, I must admit that didn't check how hot MC68K gets, I don't even remember which version I have bought 16MHz or faster but I must admit if it is 16 MHz version than Over clocking is really high :)

Boing4000, I'm sorry that I'm a bit late with adapted code I was just trying to fix as much as I can before I start working on HD emulation.

Quille


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 Post subject: Re: Pic firm. with SDHC, FAT16/32, Dir, HDD support for YQ091224
PostPosted: Fri Jan 08, 2010 12:54 am 
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Joined: Wed Jan 06, 2010 7:47 pm
Posts: 25
Hey guys,

I have a bit of a problem with the latest firmware. Basically, after the core is loaded the SD card stops working and can't find the kickstart file to continue. Compiled from SVN with MMC and FAT debug and I'm getting CMD17: No data token. The only other change I've recently made to my board is change the SD slot, as I previously had a bit of a bodge job for it, but I wouldn't think the problem has anything to do with that, as the core is loaded fine and works (even tried the VIC20 core and it booted). I could revert to a previous version and see if that works to see if it's an unrelated problem with the board but I'm asking anyway. I reflowed anything related to the SD card just in case.


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 Post subject: Re: Pic firm. with SDHC, FAT16/32, Dir, HDD support for YQ091224
PostPosted: Fri Jan 08, 2010 2:16 am 
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Joined: Sat Jul 11, 2009 12:48 am
Posts: 48
Hi

Quote:
I have a bit of a problem with the latest firmware. Basically, after the core is loaded the SD card stops working and can't find the kickstart file to continue. Compiled from SVN with MMC and FAT debug and I'm getting CMD17: No data token. The only other change I've recently made to my board is change the SD slot, as I previously had a bit of a bodge job for it, but I wouldn't think the problem has anything to do with that, as the core is loaded fine and works (even tried the VIC20 core and it booted). I could revert to a previous version and see if that works to see if it's an unrelated problem with the board but I'm asking anyway. I reflowed anything related to the SD card just in case.


CMD17 is used to read from MMC...

Since you were allready able to load from MMC that sounds a bit strange ..
Anyway if you are talking about my code I would try to comment out this line for changing floppy speed.
ConfigFloppy(1, 1); //high speed mode for ROM loading

BTW: Which version of code are you using and which PIC?
I'm asking because I'm not able to build code for pic with MMC and FAT debug.

Have you tried lastest hex for pic from this thread?

Quille


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 Post subject: Re: Pic firm. with SDHC, FAT16/32, Dir, HDD support for YQ091224
PostPosted: Fri Jan 08, 2010 11:03 am 
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Joined: Wed Jan 06, 2010 7:47 pm
Posts: 25
I am using your code, from SVN. I need to disable HDD support in order to get enough flash space for MMC and FAT debug and I am compiling with a trial of the pro version of PICC-18, on an 18LF252. I tried the hex you provided here, same story. I'll try commenting out the floppy speed change. Another thing is that after CMD17 fails, the SD stops working completely until a power off, resetting gets into the no card error state.


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 Post subject: Re: Pic firm. with SDHC, FAT16/32, Dir, HDD support for YQ091224
PostPosted: Fri Jan 08, 2010 2:35 pm 
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Joined: Sat Jul 11, 2009 12:48 am
Posts: 48
Hi,

To exclude my code bugs I think you shoud try using Yakube version to see if same error happends.
Here you have his PIC version for latest FPGA core.
http://www.minimig.net/viewtopic.php?f=5&t=269

This is just to exclude that my code is problematic ..
I would also try other SD/MMC card or reformat this one and return files other than that I don't have clue what might be an issue.
Reason why card is not responding on reset is probably because it is stuck on executing previous command that is not aborted.
Have you changed resistors near mmc slot because this might have potential timing isses but Yaqube will be probably better to help you with this because I really don't know that much about electronics.

Quille


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 Post subject: Re: Pic firm. with SDHC, FAT16/32, Dir, HDD support for YQ091224
PostPosted: Fri Jan 08, 2010 6:51 pm 
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Joined: Wed Jan 06, 2010 7:47 pm
Posts: 25
OK, I've done several tests, it's not the code. The earlier version that was working for me is not anymore either. The only other change on the board is the socket. I've just desoldered it and put it back on but it did not make a difference, which doesn't make much sense! I'll have to scope the card and see what the clock looks like but I find it very off that the first set of reads, before the FPGA goes live, work fine.


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