Minimig Discussion Forum

Discussing the Open Source FPGA Amiga Project
It is currently Fri Dec 15, 2017 12:52 am

All times are UTC




Post new topic Reply to topic  [ 5 posts ] 
Author Message
 Post subject: Port to Nexys4Video board
PostPosted: Tue Nov 21, 2017 12:44 am 
Offline

Joined: Mon Nov 20, 2017 3:26 pm
Posts: 4
Hi, I'd like to try porting Minimig to the Nexys4 Video board.

Where's the best place to start ? Is there a zip file with RTL code somewhere ?

I'm mainly interested in getting text output and keyboard input working first. I plan to turn it into a multi-core machine.


Top
 Profile  
 
 Post subject: Re: Port to Nexys4Video board
PostPosted: Wed Nov 22, 2017 1:03 pm 
Offline

Joined: Mon Nov 20, 2017 3:26 pm
Posts: 4
After a hectic day and a half of porting it doesn't work - yet.

I started a port of Minimig to the NexysVideo board. I found a version of Minimig to start with (the original I think). I had to re-write the clock module to make use of the 100 MHz source clock on the board. And alter the clocks used in the system. A top level module was created and the TG68 core, an RGB2DVI converter core, and sync generator core added. I’ve also decided to go for a 640x768 display, rather than 640x512. Currently the screen comes up blank and I was expecting a menu. It looks like the cpu isn’t booting properly. (The low abits are all fixed at ones). The system is probably clocking properly because the monitor reports the display resolution as 1280x768.

Clock Calculation: (based on 1280x768 display).
1680 total horizontal clocks @80MHz for 1280x768 display.
Why ? 80MHz = 1/5 of 400MHz, 400MHz = DDR3 clock rate, reused for RGB2DVI converter.
227 horizontal positions (bus clocks) for the Amiga display (one scan line)
To get 640 displayed pixels per scan line in NTSC, the pixel rate has got to be about 16MHz.
640 pixels = ½ of 1280, so the pixel clock rate needs to be ½ 80 MHz = 40 MHz. Minimig original uses a 28MHz clock rate.
1680/227 = 7.4 (ratio of video to bus clocks).
For the ideal bus rate the clock rate has to be 7.4 times lower than the clock rate for 1680.
So the bus clock rate needs to be 80MHz / 7.4 = 10.8 MHz (vs 3.58MHz base rate). This is roughly 3x the Amiga rate which makes sense because the horizontal frequency for 1280x768 mode is about 3x that of an NTSC display (15750).
In order to keep all the clock edges synchronous it’s probably better to use 10 MHz.
At a 10MHz rate only 1680/8 = 210 bus cycles.
To get to 227 horizontal positions 17 more bus clocks are needed, which is 17*8 + 1680 = 1816 total for the scanline. But hopefully we can live with 210 bus cycles.
*Audio DMA would be occurring at 3x the normal rate. May have to limit audio dma to every third scanline.

There are 768 scanline this is 1/3 more than 512 scanlines in a 640x512 display. The total number of vertical lines has to be increased in order to get the sync rate close to 60Hz.


Top
 Profile  
 
 Post subject: Re: Port to Nexys4Video board
PostPosted: Wed Nov 22, 2017 11:57 pm 
Offline

Joined: Mon Nov 20, 2017 3:26 pm
Posts: 4
Progress ! A testbench for the system was created for debugging. Debugging revealed that the system never got out of reset because the control module counted end-of-frame pulses, end the end-of-frame pulses were too narrow to be picked up by the clock. So, using a higher speed clock in the control module seems to have fixed that problem. In the test bench it’s visible that the cpu now starts up and runs several dozen instructions then hangs. Still no output from the real hardware.


Top
 Profile  
 
 Post subject: Re: Port to Nexys4Video board
PostPosted: Fri Nov 24, 2017 6:18 am 
Offline

Joined: Mon Nov 20, 2017 3:26 pm
Posts: 4
Adapted DDR3 code from Digilent’s looper demo for the MinimigN4V. Hopefully the DDR ram can be accessed fast enough. Accessing the DDR as if it were a static ram doesn’t make the best use of the ram’s bandwidth especially since only 16 of 128 available bits are being fetched or stored at one time. There’s 512MB ram onboard so the addressing range for the Amiga was extended to 32 bits from 24 bits. I’m sure this has been done by someone before. The Amiga’s memory map strikes me as being a bit messy.

Changed the base video mode to 800x600 VGA. I guess I just can’t make up my mind as to the best mode to use. The monitor reports it as 652x600 mode as I trimmed a few cycles off the timing in order to get a multiple of 227 units. There are 908 cycles horizontally so I’m not sure why the monitor reported such a low resolution. A 640x512 display can be centered in this mode.

I’m learning a bit about the Amiga.


Top
 Profile  
 
 Post subject: Re: Port to Nexys4Video board
PostPosted: Sat Dec 02, 2017 10:17 pm 
Offline

Joined: Wed May 27, 2009 10:51 pm
Posts: 480
Good work "DblDragon" and don`t wonder when here is not much traffic in the forum at the moment. At the time, where the Minimig Firmware and Core was not so compatible and updates came out regurarly, there was much more activity here in the forum.

Now, that a compatibility-quote over 99% is reached, people seems to more "use and enjoy" their Minimigs than being on the forum. :) But maybe now are only silent months and more life will come back here? We will see.


Top
 Profile  
 
Display posts from previous:  Sort by  
Post new topic Reply to topic  [ 5 posts ] 

All times are UTC


Who is online

Users browsing this forum: No registered users and 2 guests


You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot post attachments in this forum

Search for:
Jump to:  
cron
Powered by phpBB © 2000, 2002, 2005, 2007 phpBB Group
Translated by Xaphos © 2007, 2008, 2009 phpBB.fr